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11.4 S.M.A.R.T. Read Attribute Thresholds
This command returns one sector of SMART attribute thresholds.
Table 128: S.M.A.R.T. read data (Feature D1h)
Task File Register
7
6
5
4
3
2
1
0
COMMAND
B0h
DRIVE/HEAD
1
1
1
D
nu
CYLINDER HI
CYLINDER LOW
SECTOR NUM
SECTOR COUNT
FEATURES
The data structure returned is:
Table 129: S.M.A.R.T. Data Structure
C2h
4Fh
nu
nu
D1h
Offset
Value
Description
0..1
2..361
0010h SMART structure version for Firmware “1”
Attribute threshold entries 1 to 30 (12 bytes each)
362..379
380..510
511
00h
00h
Reserved
-
Data structure checksum
Table 130: Spare Block Count Attribute Threshold
Offset
0
1
2..11
Value
C4h
19h*
00h
Description
Attribute ID – Reallocation Count
Spare Block Count Threshold (* typical 25%, could vary)
Reserved
Table 131: Spare Block Count Worst Chip Attribute Threshold
Offset
0
1
2..11
Value
D5h
00h
00h
Description
Attribute ID – Reallocation Count
No threshold
Reserved
Table 132: Erase Count Attribute Threshold
Offset
0
1
2..11
Value
E5h
01h*
00h
Description
Attribute ID – Erase Count Usage (vendor specific)
Erase Count Threshold (* typical 1%, could vary)
Reserved
Table 133: Total EC C Errors Attribute Threshold
Offset
0
1
2..11
Value
CBh
00h
00h
Description
Attribute ID – Number of ECC errors
No threshold for the Total ECC Errors Attribute
Reserved
Table 134: Correctable ECC Errors Attribute Threshold
Offset
0
1
2..11
Value
CCh
00h
00h
Description
Attribute ID – Number of corrected ECC errors
No threshold for the Correctable ECC Errors Attribute
Reserved
Table 135: UDMA CRC Errors Attribute
Offset
0
1
2..11
Value
C7h
00h
00h
Description
Attribute ID – UDMA CRC error rate
No threshold for the UDMA CRC Errors Attribute
Reserved
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.00
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
C-440_data_sheet_CF-HxBU_Rev100.doc
Page 92 of 102
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